INVESTIGATION OF ANNEALING TEMPERATURE ON STRUCTURAL, MORPHOLOGIES AND ELECTRICAL PROPERTIES Al/Y2O3/SiNWs/n-Si MOS CAPACITOR

Racheal Chirwa, Alex Mutale, Ercan Yilmaz

Pages: 45–49

DOI: 10.37392/RapProc.2022.11

In this paper, we report the influence of post deposition annealing temperature on structural, morphological, and electrical properties of silicon nanowires (SiNWs) with Y2O3. SiNWs were fabricated by metal assisted chemical etching (MACE) method at room temperature. After the fabrication process, the high-k of Y2 O3 was deposited onto SiNW/n-Si(100) by e-beam evaporation technique. Three samples of Y2O3 with SiNWs were annealed at 200oC, 400oC and 600oC in N2 ambient for 40 min, while one sample was kept as deposited, respectively. The crystalline and morphological properties of Y2O3/SiNWs/n-Si(100) were analyzed by XRD and SEM techniques. On the other hand, the electrical properties of the capacitors based on SiNWs were investigated through C-V measurements at 1MHz. We found that the capacitance value in the accumulation region, dielectric constant(k) and interface states density (Nit) decreased with an increase in the annealing temperature. This could be attributed to the formation of interfacial layer and dangling bonds during high annealing temperature.
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